Engineer, Design Verification
Marvell
VN - Ho Chi Minh
6 ngày trước

About Marvell

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology.

Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions.

Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing.

If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

Storage-BU Vietnam

With data growth proliferating, it is becoming paramount for data infrastructure to efficiently scale. Marvell is leveraging its broad portfolio of computing, networking, and storage technologies to deliver innovative architecture solutions that are revolutionizing how data storage is connected, processed, and managed.

Our SSD controllers integrate our best-in-class NANDEdge™ programmable error correction coding IP to enable multiple generations of NAND technology and maximize power-performance across client, edge, enterprise, and cloud data center markets.

Job Responsibilities :

  • Work closely with the design team to review the design spec and define detailed testplan
  • Develop UVM testbench at the block level and SOC level for complex ASIC System-On-Chips
  • Run RTL and gate-level functional verification, debug failures, analyze and improve functional and code coverage
  • Develop and improve the verification flow and methodology
  • Requirements : Description

    Description

  • Work closely with design team to review the design spec and define detailed testplan
  • Develop UVM testbench at block level and SOC level for complex ASIC System-On-Chips
  • Run RTL and gate-level functional verification, debug failures, analyze and improve functional and code coverage
  • Develop and improve the verification flow and methodology
  • Requirements

  • BS / MS in Electrical, Computer, or Computer Science with high GPA score
  • 3+ years of experience in ASIC verification
  • Knowledge of ASIC design and verification flow including RTL design, simulation, synthesis, test bench development, regression
  • Knowledge of System Verilog
  • Knowledge of UNIX environment, Perl, Shell scripting
  • Knowledge of verification methodology such as UVM / OVM / VMM, define verification approach, verification plans.
  • Knowledge of SSD / NAND / NVMe background knowledge.
  • Knowledge of CPU subsystem is a plus.
  • Knowledge of DDR / PCIE / SATA / SAS standard is a plus
  • Good written and oral communication skills in English
  • The Perks

    With competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We’ll give you all the tools you need to succeed so you can grow and develop with us.

    For additional information on what it’s like to work at Marvell, visit our page.

    Your Future

    Marvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance.

    If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.

    All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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