About MarvellAt Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology.
Trusted by the world’s leading technology companies for 25 years, we move, store, process and secure the world’s data with semiconductor solutions designed for our customers’ current needs and future ambitions.
Through a process of deep collaboration and transparency, we’re ultimately changing the way tomorrow’s enterprise, cloud, automotive, and carrier architectures transform for the better.
The data infrastructure that our customers build has never been more critical to our global economy. It’s what’s keeping the world connected, businesses running, and information flowing.
If you’re ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.The OpportunityStorage BU - VietnamJob Responsibilities : DescriptionPerform logic synthesis at sub-system or top level for multi-million gate ASIC projectsPerform ECO (Engineering-Change-Order) and formal verificationWork with logic design and PnR engineers on logic, timing, power and physical issues.
Manage schedules and support cross-functional engineering effort.Implement, enhance and maintain synthesis scripts.Contribute to the continuous development of IC design flowRequirements : RequirementsBS / MS in Electrical Engineering / Computer Engineering, or related fields and 6+ years of experiences working on logic synthesis for multi-million-gate ASIC / SoC projects.
Newly graduated candidate with 7+ GPA is also welcome.Very familiar with IC design flow.Experiences in commercial implementation tools for logic synthesis (DC, Genus), formal verification (LEC, Formality), STA (PrimeTime, Tempus).
Experience of synthesizable Verilog and / or VHDL codes.Experience in Linus environment and writing / using scripting languages such as Perl, TCL, etc.
Knowledge of area, speed, power optimizations during logic synthesis.Self-motivated and excited to learn new skills, tools, IP, and design flows.
Good written and oral communication skills in English.Experience in timing constraint development and timing constraint debug is a plusExperience in Conformal ECO flow, PnR tools is plusThe PerksWith competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture.
We’ll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
Your FutureMarvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance.
If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.